A discrete algorithm for the regularization of hierarchical VHDL-AMS models

The powerful capability of VHDL-AMS to describe complex continuous systems in the form of differential algebraic equations (DAEs) often leads to problems during numerical simulation. This paper presents a discrete algorithm to analyze unsolvable DAE systems and to correct the underlying hierarchical VHDL-AMS description automatically in interaction with the designer, avoiding time-consuming manual error correction.