Back radiation reduction of 60 GHz CMOS slot Antenna-on-Chip (AoC) using Artificial Dielectric Layer (ADL) for Area Reuse

Antenna-on-Chip (AoC) integration with other radio frequency and digital circuits is a prime target for complete System-on-Chip (SoC). However, CMOS AoC integration suffers from two main disadvantages. First, AoC suffers from losses due to low resistivity CMOS substrate (σ=10S/m) which leads to reduction of the AoC efficiency (A. Barakat, et al, IEEE IMS, June2013). Second, AoC occupies a large area that cannot be reused because of the strong field below the AoC.