Y.-K. Choi, Y.-C. Jeon, P. Ranade, H. Takeuchi, T.-J. King, J. Bokor, and C. Hu, "30 nm ultra-thin-body SOI MOSFET with selectively deposited Ge raised S/D", IEEE 58th Device Research Conf., pp. 23-24, 2000
X. Huang, W.-C. Lee, C. Kuo, D. Hisamoto, L. Cang, J. Kedzierski, E. Anderson, H. Takeuchi, Y.-K. Choi, Kazuya-Asano, V. Subramanian, T.-J. King, J. Bokor, and C. Hu, "Sub 50-nm FinFET: PMOS", IEDM Tech. Dig., pp. 67-70, 1999
Nanoscale ultrathin body (UTB) p-channel MOSFETs with body thickness down to 4 nm and raised source and drain (S/D) using selectively deposited Ge are demonstrated for the first time. Devices with gate length down to 30 nm show high drive current, low off current, and excellent short-channel behavior. Mobility enhancement and threshold-voltage shift due to the quantum confinement of inversion charge in the ultrathin body are investigated.