By Ali N. Akansu; Sanjeev R. Kulkarni; Dmitry M. Malioutov
Wiley-IEEE Press Books & eBooks
In this paper we refine work of Maley  on one-dimensional compaction with automatic jog insertion. More precisely, we give an algorithm with running time O((n2 + k) log n), where k = O(n3) is a quantity which measures the difference between the input and the output sketch, and so improve upon Maley's O(n4) algorithm. The compaction algorithm takes as input a layout sketch; the wires in a layout sketch are flexible and only indicate the topology of the layout. The compacter minimizes the horizontal width of the layout whilst maintaining its routability. The exact geometry of the wires is filled in by a router after compaction.