We present a new erase saturation issue compromising the performance of cylindrical charge-trap cells integrated along junction-less NAND strings. The phenomenon comes from the inability to properly induce an inversion layer in the inter-cell regions of the string during read in the cylindrical geometry, pinning the threshold voltage (VT) resulting from cell erase. The dependence of this issue on string parameters is investigated, showing that a reduction in the inter-cell regions may relieve it. However, this originates a trade-off against the constraints raised by the lateral diffusion of electrons in the charge-trap layer during data retention. It is shown that this trade-off can be easily managed by strings with large substrate radius, while its solution is more critical for small radii.