Model checking has been proven to be a powerful tool in verification of sequential circuits, reactive systems, protocols, etc. The model checking of systems with huge state spaces is possible only if there is a very efficient representation of the model. Ordered Binary Decision Diagrams (OBDDs) allow an efficient symbolic representation of the model. Our goal is to accelerate the variable reordering process but retaining good OBDD sizes. To obtain this, we adapted two methods introduced by Meinel and Slobodova called Block Restricted Sifting (BRS) and Sample Sifting to the needs of model checking.