We present the field programmable array of analog and digital devices (FPAADD) as a novel implementation of a field programmable mixed-signal array (FPMA). The FPAADD is a hybrid combination of a field programmable analog array (FPAA) and a field programmable gate array (FPGA). Unlike other FPMAs where the FPGA and FPAA portions are kept separate, this architecture closely integrates the two in a fine-grained interleaved array. Instead of using hard-coded data converters, the FPAADD synthesizes data converters out of its reconfigurable fabric. The analog and digital portions share a common global interconnect. Floating gate (FG) transistors are used as the switch and memory elements of the chip, providing better switch performance and power over traditional static random-access memory-based approaches. The precise programmability of the FG switches also allows for computation to take place in the interconnect. These key differences make the FPAADD much more general purpose than previous FPMA architectures. The FPAADD consists of 27 × 8 array of 108 digital and 108 analog tiles and peripheral circuitry on 5 × 5 mm2 die fabricated in a 0.35- μm CMOS process, and contains more than 130 000 FG transistors.