A CMOS three-stage ring oscillator is examined in UMC 0.18μm technology. The influence of resistor and PMOS transistor, as inverter feedbacks, on the ring oscillator frequency and the peak-to-peak amplitude is investigated. Simulation results showed that by varying the feedback transistor control voltage from 0 to Vdd, the ring oscillating frequency can be controlled in the range of 1.46 GHz for the three PMOS transistor feedbacks topology, 0.86 GHz in the two feedbacks architecture, and 0.36 GHz (the best case) in the one feedback ring oscillator design. In the case of ring oscillator design with three resistive feedbacks, the working frequency is decreased from 5.6 GHz to 3.92 GHz, for the resistance changes from 0.5 kΩ to 4 kΩ. Moreover, the maximum frequency obtained in the latter case is significantly higher than 3.77 GHz achieved without any feedback.