Many architectures of transistor only simulated inductors (TOSI) have been proposed until now in literature. Exhibiting tuning possibilities, low chip area and offering integration facility, they constitute promising architectures to replace passive inductors in RF circuits. An improved CMOS active inductor topology is proposed in this paper. With a novel loss compensation scheme, frequency increase up to 1.1 GHz (30%-66%) of the inductor self resonant frequency is achieved in the frequency band 1.5-3.3 GHz with large quality factors and very low current consumption. Besides, a more accurate passive model is proposed for CMOS TOSI active inductors and tested for this particular topology. Consisting of four parallel branches, it is still second order even though it contains three conservative elements. The model is sufficient general and proves superior performances over the classical RLC model mainly for higher frequencies. The simulations were carried out in a 0.18 um CMOS process.