Electrostatic discharge (ESD) protection becomes essential to advanced integrated circuits (IC). Very fast IEC-ESD failure and protection design are emerging challenges for contemporary ICs, particularly for consumer and portable electronics. This paper presents a new mixed-mode IEC-ESD simulation-design method, which involves process, device, circuit and system level simulation to accurately address the ultra-fast IEC ESD phenomena. The new IEC-ESD design technique allows ESD design optimization and prediction. Experimental results are depicted to validate the new design technique.