An improved analytical model of the CMOS 65-, 45-, and 32-nm silicon technology integrated transmission line is proposed. This model is derived from previous classical ones used for printed circuits board lines. Improvements have been performed to take into account the size of integrated lines. The study is validated up to millimeter-wave frequencies for different linewidths realized with various metal levels. Accurate results allow the model to be implemented in commercial computer-aided design software commonly used for millimeter-wave designs. A comparison with commercial tools is carried out.