Pin-in-hole technology (ceramic electronic-circuit-chip carriers with pins that are inserted into the plated through holes of epoxy-glass printed circuit cards) dominated IBM subsystem-assembly technology through the 1960s and 1970s. The 1980s saw the emergence of surface mount technology (SMT), peripherally leaded components mounted on the surface of printed circuit cards. SMT no longer required large plated through holes in the circuit cards to accommodate chip carriers with pins and thereby provided higher-efficiency packaging. In the 1990s the need for packages with higher and higher I/O counts is being driven by the increased circuit density of CMOS device technology. These 1/0 demands are driving peripherally leaded surface-mounted components to smaller pitches (lead-to-lead spacing), which in turn has decreased circuit card assembly yields through added process complexity, and has thus increased the overall device packaging cost.
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