The Institute of Electronics, Chinese Academy of Sciences (IECAS) is developing an S-band 100 MW klystron for linear accelerators. The klystron has five-cavities, including a double-gap 2pi-mode output cavity. The output section consists of a cavity with double gaps and one output waveguide. To date two prototypes were fabricated. Unfortunately, the first one was suffered from leaking on the edge of the high-voltage ceramic as its operating voltage reached 220 kV. Nowadays the conditioning of the second one is underway which has reached a voltage of 350kV. In this paper the design considerations and the key technical issues are described and the preliminary test results of the klystron are given.