This paper addresses the problem of the co-design of heterogeneous multiprocessor SoC tailored to embedded applications. In particular, the presented work starts from an existing co-design flow with the aim to propose innovative extensions to the system design exploration step. Such extensions allow the methodology to propose an HW/SW partitioning of the specification, mapping this one onto an automatically selected heterogeneous architecture, being aware not only of the computational issues (i.e. the automatic selection of the heterogeneous executors composing the SoC architecture) but also to take into consideration the communication ones (i.e. the automatic selection of the links and the topology interconnecting the selected executors). The detailed description of the adopted heuristic and metrics represents the core of the paper.