Porous silicon was formed in the highly doped layer of the n/n+/n structure. After full oxidation of porous silicon, CMOS devices were fabricated in insulated single-crystal silicon islands. Mobilities of 540 cm2/Vs and 180 cm2/Vs are found for N-channel and P-channel transistors with low spread of threshold voltages. Results also indicate very low leakage currents, typically less than 10Â¿13 A/Â¿m width. Processed wafers, 100 mm in diameter, are flat without evidence of any warpage.