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Novel Anisotropic Strain Engineering on (110)-Surface SOI CMOS Devices using Combination of Local/Global Strain Techniques

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8 Author(s)
T. Mizuno ; MIRAI-AIST, 1 Komukai Toshiba-cho, Saiwai-ku, Kawasaki, Japan 212-8582; Kanagawa University, 2946, Tsuchiya, Hiratsuka 259-1293, Japan ; T. Irisawa ; N. Hirashita ; Y. Moriyama
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