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Efficient simulation of high speed digital circuits using time adaptive FD-TD technique

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4 Author(s)
P. Ciampolini ; Istituto di Elettronica, Università di Perugia, Perugia, Italy Ph. +39-75-5852658, Fax +39-75-5852654, e-mail: ; P. Mezzanotte ; L. Roselli ; R. Sorrentino