Presents a new methodology for dynamic memory management of embedded telecom network systems. This methodology enables the designer to further raise the abstraction level of the initial system specification and to achieve optimized embedded system designs. This methodology is well suited for systems characterized by a set of concurrent and dynamic processes, very high-bit-rate data streams, and intensive data transfer and storage, as encountered in telecom network applications. Up to now, it has been successfully applied to four telecom network systems. This methodology can be easily integrated into any C++-based system synthesis approach that bridges the gap between a concurrent process-level system specification and an optimized (for area, performance, or power) embedded implementation of communicating hardware/software processors. This is in contrast to current system design practice, where VHDL/C is derived without room for exploration, refinement, and verification, leading to expensive late design iterations. In this paper, the main focus lies on the system-level specification model and the dynamic memory management applied to two real-life telecom network systems.