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A novel double offset-implanted source/drain technology for reduction of gate-induced drain-leakage with 0.12-μm single-gate low-power SRAM device

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7 Author(s)
Sang-Hun Seo ; Memory Div., Samsung Electron. Co. Ltd., Gyungki-Do, South Korea ; Won-Suk Yang ; Han-Sin Lee ; Moo-Sung Kim
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