Internal gettering can be used to reduce crosstalk in imagers and latchup susceptibility in CMOS circuits. The internal gettering process forms defects in the bulk of the silicon wafers that are effective recombination sites for minority carriers in the substrate. Experimental and theoretical results are presented for crosstalk reduction obtained in an area imager. The current gain β of the parasitic lateral n-p-n transistors formed in the substrate in CMOS circuits was considerably lower for the internally gettered wafers. The trigger current needed to initiate latch-up in the n-p-n-p structures increased as 1/β, in accordance with the theory. A Monte Carlo method was developed to calculate the expected transistor current gain. The calculated βs are in excellent agreement with the measured values.