Two fully monolithic clock and data recovery (CDR) circuits for serial optical fiber links are presented. One CDR is targeting SONET OC-192 application while the other is a possible 10-GigaBit Ethernet application using 8B/10B coded data. The ICs are fabricated in a SiGe BiCMOS technology with a 45-GHz cut-off frequency. The CDRs extract a full rate clock and recover data from a random input bit stream. Each IC integrates a novel self-correcting phase detector, a delay-interpolating ring voltage-controlled oscillator, and a lock-to-reference loop for frequency acquisition. High-speed operation, low time jitter, and large jitter tolerance are the main features of the circuits. Each macro dissipates about 320 mW from 3.3-V supply.