Embedded devices are resourceconstrained devices. They have limited computation power, a small memory footprint, and a low-capacity battery. The computational power is defined by the processor type, its architecture, bus width, and register set. The primary (system) memory available is generally a few megabytes to a gigabyte or two. Secondary storage is either absent or present as flash memory. The batteries provided are of low capacity and need periodic charging depending upon the usage. All these hardware constraints challenged the software developers to design highly optimized software architecture that could fully leverage the capabilities provided by these devices without hampering the performance or user experience. Several algorithms for process scheduling, cache management, memory management, and power management are available that help in achieving the above objectives. Recent advances in technology have enabled embedded systems to have processors with multiple cores, each core running at over 1 GHz speed. One such system, the system-on-chip (SoC) is described. SoC comprises several microthermal sensors attached to various hot spots within the chip. These sensors detect the temperature of the chip at regular intervals and feed them to a programmable subtractor circuit. The other input to the subtractor is the threshold temperature. The differential result is fed to dedicated registers that are accessed by the software. Another system, dynamic power management (DVFS) is also described. It plays an important role in reducing the temperature as it lowers the voltage and frequency of operation. The peripherals that are not in use are either power gate d or clock gate d depending upon the power state of the device. Though the measures taken to limit temperature within reasonable limits hamper the performance of the device and the user experience due to reduced frequency of operation and various peripheral shutdowns, they are nonetheless required to enhance the - ife of the chip and the product.