This paper presents some strategies for design space exploration of FPGA-based signal processing systems that are specified using the CAL dataflow language. The actor-oriented, high-level of abstraction provided by CAL allows flexible exploration and consequently results in a wide range of feasible design implementations. We have applied and extended the existing techniques for refactoring and pipelining actors and actions by means of critical path analysis, and introduced some new buffering techniques based on heuristics. The combinations of these techniques have been applied on the CAL specification of the MPEG-4 video decoder, and synthesized to HDL for evaluation in the design implementation space. Results show that using our configuration for the exploration of 48 design points, a throughput range of roughly 8× has been achieved, for slice, block RAM, frequency, and latency range of 1.3×, 2.5×, 2.5×, and 2.9× respectively.