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An 8-b 400-MS/s 2-b-Per-Cycle SAR ADC With Resistive DAC

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7 Author(s)
Hegong Wei ; State Key Lab. of Analog & Mixed Signal VLSI, Univ. of Macau, Macao, China ; Chi-Hang Chan ; U-Fat Chio ; Sai-Weng Sin
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Author(s)

Hegong Wei
State Key Lab. of Analog & Mixed Signal VLSI, Univ. of Macau, Macao, China
Chi-Hang Chan ; U-Fat Chio ; Sai-Weng Sin ; Seng-Pan U ; Martins, R.P. ; Maloberti, F.

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