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A trimless, 0.5V–1.0V wide voltage operation, high density SRAM macro utilizing dynamic cell stability monitor and multiple memory cell access

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12 Author(s)
Kushida, K. ; Center for Semicond. R&D, Toshiba Corp. Semicond. Co., Kawasaki, Japan ; Hirabayashi, O. ; Tachibana, F. ; Hara, H.
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