Advances in distributed system technology have enabled new computation paradigms such as Grid, Cloud, and Internet computing. Due to the logical and physical organization of these paradigms, portable and embedded computing devices are being developed and naturally becoming an integral part of these systems. In addition to stringent area and power requirements, design constraints such as time-to-market and competitive margin pose serious challenges to embedded hardware designers. One of the most promising avenues to overcome these challenges is reconfigurable hardware. In this work, FPGA-based reconfigurable hardware is examined. As a case study, Principal Component Analysis (PCA), the classical technique to reduce the dimensionality of data and to extract dominant features, is designed and implemented as hardware on FPGA to be reconfigured dynamically during execution. Using part of a handwriting analysis application together with a benchmark dataset, experiments are performed to evaluate the feasibility, efficiency, and flexibility of reconfigurable hardware.