This paper describes the design topologies and considerations of a differential sinusoidal-output digitally controlled crystal oscillator (DCXO) intended for use in cellular applications. The oscillator has a fine-tuning range of ±44 ppm, approximately 14 bits of resolution, and an average step size of 0.005 ppm. All signals connecting externally to I/O pins are sine waves for reducing noise, interference, and spurs couplings. The 26 MHz DCXO fabricated in 65 nm CMOS achieves a phase noise of -149.1 dBc/Hz at 10 kHz offset measured at the sine wave buffer output. The DCXO is capable of meeting the stringent phase noise requirements for IEEE 802.11n 5 GHz WLAN devices. A typical frequency pulling of 0.01 ppm due to turning on/off the sine wave buffer is measured. The DCXO dissipates 1.2 mA of current, whereas each sine wave output buffer draws 1.4 mA. The DXCO occupies a total silicon area of 0.15 mm2 .