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Modeling MOS snapback and parasitic bipolar action for circuit-level ESD and high-current simulations

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4 Author(s)
A. Amerasekera ; Semicond. Process & Design Center, Texas Instrum. Inc., Dallas, TX ; Mi-Chang Chang ; C. Duvvury ; S. Ramaswamy

Author(s)

A. Amerasekera
Semicond. Process & Design Center, Texas Instrum. Inc., Dallas, TX
Mi-Chang Chang ; C. Duvvury ; S. Ramaswamy