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Computing the entire active area/power consumption versus delay tradeoff curve for gate sizing with a piecewise linear simulator

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3 Author(s)
Berkelaar, M.R.C.M. ; Eindhoven Univ. of Technol., Netherlands ; Buurman, P.H.W. ; Jess, J.A.G.

Author(s)

Berkelaar, M.R.C.M.
Eindhoven Univ. of Technol., Netherlands
Buurman, P.H.W. ; Jess, J.A.G.