Threshold voltage characteristics are presented for a double boron-ion-implanted n-channel enhancement MOSFET device for high speed logic circuit applications. A 15-Ω-cm high resistivity p-type (100) substrate was used to achieve low junction capacitance and low threshold substrate sensitivity. A shallow boron implant was used to raise the threshold voltage, and a second, deeper, boron implant was used to increase the punch-through voltage between the source and the drain. This design is especially beneficial for short channel devices, while maintaining the low junction capacitance and low threshold substrate sensitivity of the high resistivity substrate. A one-dimensional analysis was performed to predict the effects of ion implantation dose and energy on the device characteristics, and a quasi two-dimensional analysis was used to account for the short channel effect. The calculated results agree well with the behavior of experimental devices fabricated in the laboratory.
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