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Equivalence checking of high-level designs based on symbolic simulation

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4 Author(s)
Matsumoto, T. ; VLSI Design & Educ. Center, Univ. of Tokyo, Tokyo, Japan ; Nishihara, T. ; Kojima, Y. ; Fujita, M.

Author(s)

Matsumoto, T.
VLSI Design & Educ. Center, Univ. of Tokyo, Tokyo, Japan
Nishihara, T. ; Kojima, Y. ; Fujita, M.