During the development of a VLSI (Very Large Scale Integration) circuits; their internal stress due to packaging combined with local self heating becomes serious and may result in large performance variation, circuit malfunction and even chip cracking. Surface peaks thermal detection is necessary in large VLSI circuits. This paper presents a VLSI circuit thermal stress monitoring approach using surface peak thermal detector algorithm and GDS (Gradient Direction Sensors) method. The design of surface peak thermal detector algorithm (SPTDA) with flexible modular-based architecture will be presented. Several approaches were implemented to achieve a better performance for the SPTDA algorithm operation. A parallel processing strategy is used to minimize computational delay. Furthermore, a hardware-efficient factoring approach for calculating tangent and division functions required by SPTDA algorithm is used to minimize silicon space in regards of their implementation. Description of the algorithm developed for the surface peaks thermal detection and the architecture implementation results are reported and compared with finite element method (FEM) temperature computations.