A52-Gb/s 16:1 quarter-rate clocking transmitter for high-speed serial data transmission is designed to utilise 0.13-mum SiGe bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. The quarter-rate transmitter consists of a 16:1 multiplexer (MUX), a voltage-controlled ring oscillator, a phase-locked loop (PLL), a pseudorandom data generator and an output amplifier. The voltage-controlled ring oscillator has a wide tuning range from 11 to 22 GHz with feedforward loop and delay interpolation. A continuous model of a third-order PLL is developed and used to optimise loop filter parameters and to estimate the PLL performance in a simulation. The PLL achieves a low phase noise of -124.6 dBc/Hz at 1 MHz offset. The 16:1 MUX features quarter-rate clock multiplexing with multi-phase voltage-controlled oscillator clocks. In the design of a 16:1 MUX, an edge-channelling 4:1 MUX is used to alleviate a duty cycle and a jitter problem.