A new method of temperature compensation for a dc logarithmic amplifier is presented. By this method temperature effect on both parallel shift and slope variance of log I vs. VBE curve can be compensated easily by using only one compensating resistor of copper wire wound type. (hereafter called parallel and slope compensations.) An absolute compensation condition can be determined for each type of logarithmic transistors, like silicon NPN, germanium PNP irrespective of current measuring range. The temperature dependence of the logarithmic amplifier is reduced to 0.01 decade for the temperature range from 0Â°C to 50Â°C and the current range from 10-11 to 10-3A.