This paper describes an extensive experimental study of TiN/HfO2/SiGe and TiN/HfO2/Si cap/SiGe gate stacked-transistors. Through a careful analysis of the interface quality (interface states and roughness), we demonstrate that an ultrathin silicon cap is mandatory to obtain high hole mobility enhancement. Based on quantum mechanical simulations and capacitance-voltage characterization, we show that this silicon cap is not contributing any silicon parasitic channel conduction and degrades by only 1 Å the electrical oxide thickness in inversion. Due to this interface optimization, Si0.72Ge0.28 pMOSFETs exhibit a 58% higher mobility at high effective field (1 MV/cm) than the universal SiO2/Si reference and a 90% higher mobility than the HfO2/Si reference. This represents one of the best hole mobility results at 1 MV/cm ever reported with a high-κ/metal gate stack. We thus validate a possible solution to drastically improve the hole mobility in Si MOSFETs with high-κ gate dielectrics.