This paper deals with the latest version of Experimental GNSS receiver built at the Czech Technical University and describes integration of GLONASS signal processing to the receiver. The new FPGA platform Virtex-D Pro by Xilinx is used and enables integration of whole digital signal processing of GNSS receiver into the single chip. The RE unit of the receiver is capable of processing all GLONASS frequency of the Li and L2 bands in two independent RE channels; each channel can process one band. The frequency selection of the appropriate satellite is accomplished in a digital correlator. The development flow of the GLONASS correlator is discussed herein. The complexity of the GLONASS correlator with complexity of GPS correlator is compared. The developed GLONASS correlator was tested in Simuelink tool during development. The next test was carried out using GLONASS simulator and real GLONASS satellite signal.