Computers and Digital Techniques, IEE Proceedings -
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Latest Published Articles
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Ant colony optimisation for task matching and scheduling
Dec-04 2006 -
Efficient new approach for modulo 2n-1 addition in RNS
Dec-04 2006 -
Two-phase prediction of L1 data cache misses
Dec-04 2006 -
LSQ: a power efficient and scalable implementation
Dec-04 2006 -
Flexible GF(2m) arithmetic architectures for subword parallel processing ASIPs
Sep-06 2006
Popular Articles
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Reconfigurable computing: architectures and design methods
Jul-25 2005 -
Modified Montgomery modular multiplication and RSA exponentiation techniques
Dec-20 2004 -
Hardware/software partitioning of operating systems: focus on deadlock detection and avoidance
Jul-25 2005 -
Ant colony optimisation for task matching and scheduling
Dec-04 2006 -
1 GHz 64-bit high-speed comparator using ANT dynamic logic with two-phase clocking
Aug-06 2002
Publish in this Journal
Popular Articles (March 2013)
Includes the top 25 most frequently downloaded documents for this publication according to the most recent monthly usage statistics.-
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3. Hardware/software partitioning of operating systems: focus on deadlock detection and avoidance
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PDF (886 KB)
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5. 1 GHz 64-bit high-speed comparator using ANT dynamic logic with two-phase clocking
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PDF (284 KB)
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6. Optimisation of on-chip design-for-test infrastructure for maximal multi-site test throughput
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PDF (645 KB)
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8. Group-oriented (t, n) threshold digital signature scheme and digital multisignature
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PDF (476 KB)
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17. Asynchronous on-chip networks
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PDF (305 KB)
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18. Low power system on chip bus encoding scheme with crosstalk noise reduction capability
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PDF (170 KB)
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20. Simulation study of memory performance of SMP multiprocessors running a TPC-W workload
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PDF (1698 KB)
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21. Trade-offs in the design of a router with both guaranteed and best-effort services for networks on chip
Rijpkema, E. ; Goossens, K. ; Radulescu, A. ; Dielissen, J. ; Van Meerbergen, J. ; Wielage, P. ; Waterlander, E. |
PDF (610 KB)
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22. Topology adaptive network-on-chip design and implementation
Bartic, T.A. ; Mignolet, J.-Y. ; Nollet, V. ; Marescaux, T. ; Verkest, D. ; Vernalde, S. ; Lauwereins, R. |
PDF (472 KB)
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25. Comparison of dynamic and static load-balancing strategies in heterogeneous distributed systems
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PDF (764 KB)
Aims & Scope
Further Links
Aims & Scope
IEE Proceedings Computers & Digital Techniques publishes technical papers describing recent research and development work in all aspects of digital system-on-chip design and test of electronic and embedded systems, including the development of design automation tools (methodologies, algorithms and architectures). It is aimed at researchers, engineers and educators in the fields of computer and digital systems design and test.
Persistent Link: http://ieeexplore.ieee.org/servlet/opac?punumber=2192 More »
Frequency: 6
ISSN:
1350-2387
Published by:
Subjects
- Computing & Processing (Hardware/Software)
Contacts
Publisher
Stuart Govan
IET
Michael Faraday House
Six Hills Way
Stevenage, SG1 2AY United Kingdom
Phone:
Fax:
About this Journal
Author Resources
Title History
- ( 1994 - 2006 ) Computers and Digital Techniques, IEE Proceedings -
- ( 1980 - 1993 ) Computers and Digital Techniques, IEE Proceedings E
