IEEE Computer Architecture Letters covers areas of uni- and multiprocessor computer systems, computer architecture, microarchitecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing.
Latest Published Articles
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Including Variability in Large-Scale Cluster Power Models
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The Need for Power Debugging in the Multi-Core Environment
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Enabling Efficient and Scalable Hybrid Memories Using Fine-Granularity DRAM Cache Management
Dec-10 2012 -
MultiAmdahl: How Should I Divide My Heterogenous Chip?
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Decoupling Datacenter Storage Studies from Access to Large-Scale Applications
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B-Fetch: Branch Prediction Directed Prefetching for In-Order Processors
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The Need for Power Debugging in the Multi-Core Environment
Dec-10 2012
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Meet Our Editors
Editor-in-Chief
Kevin Skadron
Department of Computer Science
School of Engineering and Applied Science
University of Virginia
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Popular Articles (March 2013)
Includes the top 25 most frequently downloaded documents for this publication according to the most recent monthly usage statistics.Society Sponsor
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7. Enabling Efficient and Scalable Hybrid Memories Using Fine-Granularity DRAM Cache Management
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PDF (143 KB)
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9. A Hybrid PRAM and STT-RAM Cache Architecture for Extending the Lifetime of PRAM Caches
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PDF (5262 KB)
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10. Heterogeneity in “Homogeneous” Warehouse-Scale Computers: A Performance Opportunity
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PDF (145 KB)
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14. Multicore DIMM: an Energy Efficient Memory Module with Independently Controlled DRAMs
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PDF (119 KB)
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16. An Overview of Static Pipelining
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PDF (145 KB)
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17. Mitigating the Effects of Process Variation in Ultra-low Voltage Chip Multiprocessors using Dual Supply Voltages and Half-Speed Units
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PDF (168 KB)
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22. High Performance, Energy Efficient Chipkill Correct Memory with Multidimensional Parity
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PDF (5568 KB)
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23. An XML-Based ADL Framework for Automatic Generation of Multithreaded Computer Architecture Simulators
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PDF (106 KB)
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Aims & Scope
IEEE Computer Architecture Letters covers areas of uni- and multiprocessor computer systems, computer architecture, microarchitecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing.
Meet Our Editors
Editor-in-Chief
Kevin Skadron
Department of Computer Science
School of Engineering and Applied Science
University of Virginia
Further Links
IEEE Computer Architecture Letters covers areas of uni- and multiprocessor computer systems, computer architecture, microarchitecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing.
Aims & Scope
IEEE Computer Architecture Letters is a rigorously peer-reviewed forum for publishing early, high-impact results in the areas of uni- and multiprocessor computer systems, computer architecture, microarchitecture, workload characterization, performance evaluation and simulation techniques, and power-aware computing.
Persistent Link: http://ieeexplore.ieee.org/servlet/opac?punumber=10208 More »
Frequency: 2
ISSN: 1556-6056
Published by:
Subjects
- Computing & Processing (Hardware/Software)
Contacts
Editor-in-Chief
Kevin Skadron
Department of Computer Science
School of Engineering and Applied Science
University of Virginia
151 Engineer's Way, PO Box 400740
Charlottesville, VA 22904-4740 22904-4740 USA
skadron@cs.virginia.edu
Phone:+1 434 982 2042
Fax:+1 434 982 2214
About this Journal
Editorial Board
Author Resources
Society Sponsor
Contacts
Editor-in-Chief
Kevin Skadron
Department of Computer Science
School of Engineering and Applied Science
University of Virginia
