A novel simulation and verification approach in an ASIC design process

We have built a fast signal-processing and readout application-specific integrated circuit (PPrAsic) for the preprocessor system of the ATLAS level-1 calorimeter trigger. Our novel ASIC design environment incorporates algorithm development with digital hardware synthesis and verification. The purely digital ASIC was designed in Verilog hardware description language and embedded in a system-wide analog and digital simulation of implemented algorithms. We present here our design environment and experience gained from the design process.