Modeling of the CoolMOS/sup TM/ transistor. II. DC model and parameter extraction

An accurate dc model for the CoolMOS/sup TM/ power transistor is presented. An elementary model consisting of an intrinsic MOSFET and a JFET to represent the drift region, is first discussed and it is pointed out that this is a rather poor model, needing improvements. Using device simulation results, it is shown that, by replacing the gate and drain voltages of the intrinsic MOSFET by appropriate "effective" voltages, a highly accurate model is obtained. A systematic procedure for parameter extraction is described and an implementation of the new model in the form of a SPICE subcircuit is given.