Implementation and characterization of self-aligned double-gate TFT with thin channel and thick source/drain

In this paper, a self-aligned double-gate (SADG) TFT technology is proposed and experimentally demonstrated for the first time. The self-alignment between the top-gate and bottom-gate is achieved by a noncritical chemical-mechanical polishing (CMP) step. A thin channel and a thick source/drain region self-aligned to the two gates are realized in the proposed process. Simulation results indicate that the self-aligned thick source/drain region leads to a significant reduction in the lateral electric field arisen from the applied drain voltage. N-channel poly-Si TFTs are fabricated with a maximum processing temperature of 600/spl deg/C. Metal-induced unilateral crystallization (MIUC) is used to enhance the grain size of the poly-Si film. The fabricated SADG TFT exhibits symmetrical bi-directional transfer characteristics when the polarity of source/drain is reversed. The on-current under double-gate operation is more than two times the sum of that under individual top-gate and bottom-gate control. High immunity to short channel effects and kink-free current-voltage (I-V) characteristics are also observed in the SADG TFTs.