A localized self-resetting gate design methodology for low power

In this paper, a modification of the traditional dynamic self-reset circuitry is introduced for low power SRAM circuit design. The reset circuitry is localized, and the negative (trailing) trigger edge of the data is used to generate the self-reset signal to avoid the problem of crowbar current from V/sub DD/ to V/sub SS/. It is demonstrated that fanouts of 6