Ultralow resistance W/poly-Si gate CMOS technology using amorphous-Si/TiN buffer layer

Advanced tungsten/pn-poly-Si gate CMOS devices with an ultralow sheet resistance of 1 /spl Omega//sq. have been demonstrated using an amorphous-Si/TiN buffer layer. A low-resistivity tungsten film is formed by large grain size tungsten on an amorphous-silicon (a-Si) film. This result can be explained by the Mayadas-Shatzkes theory. After a source/drain annealing process, W/a-Si/TiN/pn-poly-Si systems become W/WSi/sub x//TiN/pn-poly-Si systems without impurity interdiffusion between the pn-poly-Si gate electrodes. The propagation delay time of a CMOS inverter ring oscillator with this novel gate electrode is considerably smaller than that with a cobalt-salicide film in a wider channel width.