IEEE-P1552 packaging architecture for computer-busboard systems (PACS)

Initiated under IEEE-P1552 packaging architecture for computer-busboard systems (PACS) standards effort, this new electronic packaging specification extends the current two dimensional plug and play computer-based architecture of VMEbus, VXIbus, PCIbus, PXIbus, and several new standards into a three and four dimensional integrated hardware architecture. This extends power, control and signal forward front-to-back or back-to-front, in alignment with normal computer system serial functionality. Hardware interfaces relate primarily to packaging and data/signal/power interconnect mechanical/electrical mating specifications, that should permit subelements to be interchanged without impact on subelement interoperability. The standard functional performance is limited to mechanical engagement, connector styles/footprints, electrical pin characteristics, and pin mapping definitions.