A 3-pin 1.5 V 550 /spl mu/W 176 /spl times/ 144 self-clocked CMOS active pixel image sensor

This paper addresses the development of a micropower 176 /spl times/ 144 self-clocked CMOS active pixel image sensor that dissipates one-to-two orders of magnitude less power than current state of the art CMOS image sensors. The chip operates from a 1.5 V voltage source and the power consumption measured for the chip running from an internal 25.2 MHz clock yielding 30 frames per second is about 550 /spl mu/W. This amount enables the sensor to be run from a watch battery. It is believed that this chip is the world's lowest power image sensor and the first image sensor designed for a watch battery operation. The camera-on-a-chip operates as a self-clocked 3-pin sensor (GNTD, VDD (1.2 - 1.7 V), and DATAOUT). The die occupies 4 mm/sup 2/ of silicon.