A fully-integrated 900-MHz CMOS wireless receiver with on-chip RF and IF filters and 79-dB image rejection

A truly-monolithic 900-MHz CMOS wireless receiver with on-chip RF and IF filters and a fully-integrated fractional-N synthesizer is presented. Implemented in standard 0.5-/spl mu/m CMOS process and without any off-chip component, the receiver measures an image rejection of 79 dB, sensitivity of -90 dBm, IIP3 of -24 dBm and NF of 22 dB with power of 227 mW and a chip area of 5.7 mm/sup 2/. The synthesizer achieves a phase noise of -118 dBc/Hz at 600 kHz offset and settling time of less than 150 /spl mu/s.