Low power multiport memories exploration and design

We describe a multiport memories exploration and design procedure that satisfies area and/or energy constraints. Our procedure consists of use of integer linear program (ILP) models and heuristic-based algorithms to determine (i) the memory configuration with minimum area, given the energy bound, and (ii) the memory configuration with minimum energy, given the area bound. The results obtained by the heuristics match very well with those obtained by the ILP methods. In addition, the lifetime problem of arrays is considered.