High-frequency low-power multirate SC realizations for NTSC/PAL digital video filtering

This paper proposes a cost-efficient multirate Switched-Capacitor structure and its realization for a high-frequency low-power sampled-data anti-imaging filter with 108 MHz output sampling rate for CCIR-601 NTSC/PAL digital video. The filter employs a 2-stage (8-tap + 6-tap) improved multirate FIR polyphase structure with double-sampling techniques to achieve the desired linear-phase filtering with 5 MHz-corner passband (40 dB attenuation) as well as an embedded sampling rate increase from 27 MHz to 108 MHz. The circuit, designed with 0.35 /spl mu/m CMOS technology, is expected to consume only about 28 mW for the analog part at 3.0 V supply.