Fabrication of interface-controlled Josephson junctions using Sr/sub 2/AlTaO/sub 6/ insulating layers

We fabricated ramp-edge Josephson junctions with barriers formed by interface treatments instead of epitaxially grown barrier layers. A low-dielectric Sr/sub 3/AlTaO/sub 6/ (SAT) layer was used as an ion-milling mask as well as an insulating layer for the ramp-edge junctions. An ion-milled YBa/sub 2/Cu/sub 3/O/sub 7-x/ (YBCO)-edge surface was not exposed to solvent through all fabrication procedures. The barriers were produced by structural modification at the edge of the YBCO base electrode using high energy ion-beam treatment prior to deposition of the YBCO counter electrode. We investigated the effects of high energy ion-beam treatment, annealing, and counter electrode deposition temperature on the characteristics of the interface-controlled Josephson junctions. The junction parameters such as T/sub c/, I/sub c/, R/sub N/ were measured and discussed in relation to the barrier layer depending on the process parameters.