Effective channel length and external series resistance models of scaled LDD pMOSFETs operating in a Bi-MOS hybrid-mode environment

The effective channel length L/sub eff/ and total external series resistance R/sub TOText/ of deep submicron lightly doped drain (LDD) pMOSFETs, operating in a Bi-MOS hybrid-mode environment, have been modeled as functions of bias and temperature. The accuracy of the device threshold voltage used in the L/sub eff/ and R/sub TOText/ extraction routine is discussed. The proposed models have been verified for temperature ranging from 223 K to 398 K and source-to-body voltage V/sub SB/>0 V conditions.